Leadframes are used to provide a stable support structure for positioning a semiconductor die during semiconductor manufacturing. Typical leadframes include a centrally located die attach pad (DAP) surrounded by a plurality of conductive lead segments used to attach various electrical conductors in close proximity to the die. The remaining gaps between the lead segments and conductor pads on the die surface are typically bridged by thin metallic wires. In application, the other ends of the lead segments can be electrically connected to other structures, for example, a printed circuit board.
Limitations of typical lead frame-based IC manufacturing technologies include delamination defects, relatively large product size, relatively large product thickness (high profile) and limited thermal and electrical conductivity of the product. Typical lead frame design presents size constraints which limit the opportunity to reduce overall device volume. Delamination defects are often associated with the epoxy/device interface at the DAP. Additionally, electrical conductivity may be impaired as the layers of epoxy and DAP each have associated impedances. The combined impedance of the epoxy and DAP often degrades overall device performance.